Frequency synthesizers are used to expand a clock signal or to generate a high frequency clock signal from a low frequency reference clock signal. Upon being initially powered, frequency synthesizers are permitted to oscillate and settle into a frequency of operation. Frequency synthesizers use a phase-locked loop that includes a phase detector to determine whether the oscillator is operating at the desired clock signal frequency, to adjust the oscillator frequency until the desired clock signal frequency is generated, and to maintain operation of the oscillator at the desired clock signal frequency.
Since the phase detector compares the oscillator generated clock signal to the reference clock signal only at predetermined intervals to ascertain whether the compared signals are aligned, the phase-locked loop of a frequency synthesizer can lock onto a harmonic of the desired clock signal because harmonics of the oscillator generated clock signal exhibit the same characteristics during the predetermined intervals. Alignment of the oscillator generated clock signal with the reference clock signal is a necessary condition, but not a sufficient condition, to be certain that the frequency synthesizer is generating the desired clock signal frequency. A phase-locked loop can appear to be locked on the desired clock signal frequency when being harmonically locked.
Analog circuits to detect harmonic lock are known, but have been unreliable or complex to implement. It is desirable to digitally detect harmonic locking in a manner that is easy to implement and reliable.